Perlilog
- As the name implies, Perilog uses a mix of Perl and Verilog to construct parametric hardware designs.
- http://www.opencores.org/projects.cgi/web/perlilog/overview

Oroboro
- Oroboro is a testbench and modeling language that uses Python generator functions.
- http://apvm.sourceforge.net/

RHDL
- RHDL (Ruby Hardware Description Language) is an HDL based on the Ruby programming language.
- http://www.aracnet.com/~ptkwt/ruby_stuff/RHDL/

MyHDL
- MyHDL is a Python package for using Python as a hardware description and verification language.
- http://www.jandecaluwe.com/Tools/MyHDL/Overview.html

Hydra Computer HDL
- Hydra is an HDL based on the functional programming language Haskell.
- http://www.dcs.gla.ac.uk/~jtod/Hydra/

JHDL
- JHDL is a method of describing (programmatically, in JAVA) the components and connections in a digital logic circuit.
- http://www.jhdl.org/