A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming

  Link Details for: A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming

Link Title:	A Floating-Point VLSI Chip for the TRON Architecture: An Architecture for Reliable Numerical Programming
Link URL:	http://csdl2.computer.org/persagen/DLAbsToc.jsp?resourcePath=/dl/mags/mi/&toc=comp/mags/mi/1989/03/m3toc.xml&DOI=10.1109/40.31476
Link Details:	Abstract of paper on Gmicro/FPU (floating-point unit), defines 23 coprocessor instructions; with references, purchase option. [IEEE Micro]
Category:	Top : Computers : Hardware : Components : Processors : TRON
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